ATxmega64A4

ATxmega64A4 特性

• High-performance, Low-power AVR 8/16-bit AVR XMEGA Microcontroller
• Non-volatile Program and Data Memories
  – 16K - 128K Bytes of In-System Self-Programmable Flash
  – 4K Boot Code Section with Independent Lock Bits
  – 1K - 2K Bytes EEPROM
  – 2K - 8K Bytes Internal SRAM
• Peripheral Features
  – Four-channel DMA Controller with support for external requests
  – Eight-channel Event System
  – Five 16-bit Timer/Counters
  Three Timer/Counters with 4 Output Compare or Input Capture channels
  Two Timer/Counters with 2 Output Compare or Input Capture channels
  High-Resolution Extensions on all Timer/Counters
  Advanced Waveform Extension on one Timer/Counter
  – Five USARTs
  IrDA Extension on one USART
  – Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)
  – Two SPIs (Serial Peripheral Interfaces) peripherals
  – AES and DES Crypto Engine
  – 16-bit Real Time Counter with Separate Oscillator
  – One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter
  – One Two-channel, 12-bit, 1 Msps Digital to Analog Converter
  – Two Analog Comparators with Window compare function
  – External Interrupts on all General Purpose I/O pins
  – Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
• Special Microcontroller Features
  – Power-on Reset and Programmable Brown-out Detection
  – Internal and External Clock Options with PLL
  – Programmable Multi-level Interrupt Controller
  – Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby
  – Advanced Programming, Test and Debugging Interfaces
  PDI (Program and Debug Interface) for programming, test and debugging
• I/O and Packages
  – 36 Programmable I/O Lines
  – 44-lead TQFP
  – 44-pad MLF
• Operating Voltage
  – 1.6 – 3.6V
• Speed performance
  – 0 – 12 MHz @ 1.6 – 2.7V
  – 0 – 32 MHz @ 2.7 – 3.6V

ATxmega64A4 概述

The XMEGA A4 is a family of low power, high performance and peripheral rich CMOS 8/16-bit
microcontrollers based on the AVR?enhanced RISC architecture. By executing powerful
instructions in a single clock cycle, the XMEGA A4 achieves throughputs approaching 1 Million
Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conventional
single-accumulator or CISC based microcontrollers.
The XMEGA A4 devices provides the following features: In-System Programmable Flash with
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,
eight-channel Event System, Programmable Multi-level Interrupt Controller, 36 general purpose
I/O lines, 16-bit Real Time Counter (RTC), five flexible 16-bit Timer/Counters with compare
modes and PWM, five USARTs, two Two Wire Serial Interfaces (TWIs), two Serial Peripheral
Interfaces (SPIs), AES and DES crypto engine, one Twelve-channel, 12-bit ADC with optional
differential input with programmable gain, one Two-channel, 12-bit DAC, two analog comparators
with window mode, programmable Watchdog Timer with separate Internal Oscillator,
accurate internal oscillators with PLL and prescaler and programmable Brown-Out Detection.
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,
is available.
The XMEGA A4 devices have five software selectable power saving modes. The Idle mode
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and
all peripherals to continue functioning. The Power-down mode saves the SRAM and register
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,
allowing the application to maintain a timer base while the rest of the device is sleeping. In
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is
sleeping. This allows very fast start-up from external crystal combined with low power consumption.
In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue
to run. To further reduce power consumption, the peripheral clock to each individual peripheral
can optionally be stopped in Active mode and in Idle sleep mode.
The device is manufactured using Atmel's high-density nonvolatile memory technology. The program
Flash memory can be reprogrammed in-system through the PDI. A Bootloader running in
the device can use any interface to download the application program to the Flash memory. The
Bootloader software in the Boot Flash section will continue to run while the Application Flash
section is updated, providing true Read-While-Write operation. By combining an 8/16-bit RISC
CPU with In-System Self-Programmable Flash, the Atmel XMEGA A4 is a powerful microcontroller
family that provides a highly flexible and cost effective solution for many embedded
applications.
The XMEGA A4 devices is supported with a full suite of program and system development tools
including: C compilers, macro assemblers, program debugger/simulators, programmers, and
evaluation kits.

ATxmega64A4 訂購型號(hào)

ATxmega64A4 技術(shù)支持

1. ATMEL 愛特梅爾AVR 微控制器 ATxmega64A4 中文數(shù)據(jù)手冊(cè)DataSheet 下載. PDF
2. ATMEL 愛特梅爾AVR 微控制器ATxmega64A4 數(shù)據(jù)手冊(cè)DataSheet 下載. PDF
3. ATMEL 愛特梅爾半導(dǎo)體公司產(chǎn)品線. PDF (編號(hào):Atmel Products)
4. Atmel 愛特梅爾AVR 微控制器簡(jiǎn)介.PDF (編號(hào):Tech AVR 000)MLF32
5. 面向新手的AVR開發(fā)工具,及基本知識(shí).PDF(編號(hào):Tech AVR 001)
6. 使用AVR 定時(shí)/計(jì)數(shù)器的PWM功能設(shè)計(jì)要點(diǎn) .PDF (編號(hào):Tech AVR 002)