AT91RM9200-CJ-002 32位ARM單片機(jī)LFBGA-256封裝

AT91RM9200-CJ-002 描述

The AT91RM9200 microcontroller offers a flexible configuration of on- and off-chip memories together with an extensive set of peripherals for control, communication and data storage purposes. It is based on the ARM920T 200-MIPS advanced 32-bit RISC processor with 16K byte instruction and 16K byte data cache memories. It features 16K bytes of on-chip SRAM and 128K bytes of ROM, together with an external bus interface with controllers for SDRAM and static memories including NAND Flash and CompactFlash.

Its extensive peripheral set includes USB Full Speed Host and Device Ports, 10/100 Base T Ethernet MAC, Multimedia Card Interface (MCI), three Synchronous Serial Controllers (SSC), four USARTs, Master/Slave Serial Peripheral Interface (SPI), Timer Counters (TC) and Two Wire Interface (TWI). Four 32-bit Parallel I/O Controllers multiplex the pins to/from these peripherals in order to reduce the device pin count, and peripheral DMA channels maximize the data throughput between these interfaces and the on- and off-chip memories.

The AT91RM9200 has a fully featured system controller for efficient system management, including two on-chip oscillators and PLLs, clock generator, advanced interrupt controller (AIC), debug unit (DBGU), periodic interval timer, watchdog timer and real-time clock with alarm interrupt. It is supplied in a 208-pin PQFP or 266-ball BGA package.

The AT91RM9200 is supported by the AT91RM9200-EK Evaluation Board and extensive third-party application development tools. It supports both Linux and Windows CE. It targets applications requiring enhanced performance such as host processors for system control and connectivity. Examples include telematics systems connecting GPS receivers and GPRS communications, industrial automation, medical systems and point-of-sales terminals.

AT91RM9200-CJ-002 產(chǎn)品特性

? Incorporates the ARM920T? ARM? Thumb? Processor
– 200 MIPS at 180 MHz, Memory Management Unit
– 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
– In-circuit Emulator including Debug Communication Channel
– Mid-level Implementation Embedded Trace Macrocell? (256-ball BGA Package
only)
? Low Power: On VDDCORE 24.4 mA in Normal Mode, 520 μA in Standby Mode
? Additional Embedded Memories
– 16K Bytes of SRAM and 128K Bytes of ROM
? External Bus Interface (EBI)
– Supports SDRAM, Static Memory, Burst Flash, Glueless Connection to
CompactFlash? and NAND Flash/SmartMedia?
? System Peripherals for Enhanced Performance:
– Enhanced Clock Generator and Power Management Controller
– Two On-chip Oscillators with Two PLLs
– Very Slow Clock Operating Mode and Software Power Optimization Capabilities
– Four Programmable External Clock Signals
– System Timer Including Periodic Interrupt, Watchdog and Second Counter
– Real-time Clock with Alarm Interrupt
– Debug Unit, Two-wire UART and Support for Debug Communication Channel
– Advanced Interrupt Controller with 8-level Priority, Individually Maskable Vectored
Interrupt Sources, Spurious Interrupt Protected
– Seven External Interrupt Sources and One Fast Interrupt Source
– Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, Input Change
Interrupt and Open-drain Capability on Each Line
– 20-channel Peripheral DMA Controller (PDC)
? Ethernet MAC 10/100 Base-T
– Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
? USB 2.0 Full Speed (12 Mbits per second) Host Double Port
– Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)
– Integrated FIFOs and Dedicated DMA Channels
? USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
? Multimedia Card Interface (MCI)
– Automatic Protocol Control and Fast Automatic Data Transfers
– MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards
? Three Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I2S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
? Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Support for ISO7816 T0/T1 Smart Card
– Hardware Handshaking
– RS485 Support, IrDA? Up To 115 Kbps
– Full Modem Control Lines on USART1
? Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, 4 External Peripheral Chip Selects
? Two 3-channel, 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
? Two-wire Interface (TWI)
– Master Mode Support, All 2-wire Atmel EEPROMs Supported
? IEEE? 1149.1 JTAG Boundary Scan on All Digital Pins
? Power Supplies
– 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
– 3.0V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)
? Available in a 208-pin Green PQFP or 256-ball RoHS-compliant BGA Package

AT91RM9200-CJ-002 訂購型號

AT91RM9200-CJ-002 技術(shù)支持

1. AT91R40008 數(shù)據(jù)手冊DataSheet 下載. PDF
2. ARM7TDMI 技術(shù)白皮書
3. AT91SAM 系列產(chǎn)品選型指南(Brochure, 2 pages, revision E, updated 2/09)
   Product selection guide to Atmel's AT91SAM microcontrollers that give immediate access to market-leading ARM processors.
4. Atmel's ARM-based Microcontroller Excels in Real-Time (White Paper, 6 pages, revision A, updated 3/01)
   Applications such as mobile communicators, PDAs, solid-state music players and internet appliances demand the best possible real-time performance. Atmel's AT91 series of ARM-based microcontrollers incorporates a number of advanced features that enhance the real-time performance of the ARM7TDMI core, making it ideal for applications of this nature.